(Old Updates (Newest at the top)

Update 4.2.21: Mk2 receiver board has been powered up and the ADC subsystem is working. No bus response at all from the Si5351, and yet my code talks to an Adafruit board just fine. I suspect the chip is dead but have no explanation as to why. Trying a new chip today.

Update 1.2.21: The Mk2 receiver boards are back from the fab and thus far I have soldered all of the passives on. The chips are going on next then there is the board bring-up. None of this has been breadboarded, so this is when I discover all the mistakes in the schematic and the PCB layout!

Update 9.1.21: Work on Mk2 receiver is ongoing. I have tested a Bourns EMS22Q51-B28-LS4 encoder; this is a magnetic rather than an optical encoder but is still 256 steps/revolution and works very well. This is £30 + VAT from Mouser UK, which is around half the price of the optical ENS1J-B28 L00256L. I have now specified this as the preferred tuning encoder in the BOM. Also just to clarify, the Mk2 is going to be a completely different mechanical setup to the Mk1.2; the Mk1.2 is still available and suits builders wanting the 'separate PCB' setup, plus it has the ADI DDS chip which offers perfectly glitch-free tuning all the way down to 20kHz, unlike the cheaper Si5351 which is good but not as good, and won't go below 3.5MHz.

Update 27.12.20: V1.05 of the code. I decided to add a menu option to control whether the VFO frequency rounds (quantises) to the nearest tuning step when tuned (digits to the right of the tuning step become 0) or retains any offset smaller than the tuning step. Quantising is probably most convenient for normal operation. Retaining any offset in the LS digits is mostly useful for an offset channel grid, such as is found on the 27MHz CB bands or forcing a +100Hz offset from the grid when tuning AM stations.

Update 21.12.20: Merry Christmas to all builders. V1.03 of the code is still the current release as there are no pending changes/updates - all is working as intended, plus I have decided to leave both variants of the AGC impulse detector in for now. Some work has begin on a Mk2 receiver; the goal here is lower cost and component count and if I can identify a suitable source of LCD displays (!), could be a single-PCB design that will drop straight behind a front panel. There are currently ~10 kits left in the current batch for those wishing to go ahead with the current design...

Update 13.10.20: V1.03 of the code. The two AGC peak detection modes now have their own parameter storage in CMOS RAM so values are no longer constantly being reset. Bug fix to data decode text printing; this was taking too long resulting in UI glitches (gaps in the S-meter needle drawing). BOM spreadsheet updated to include the few extra parts now included in the kit.

Update 14.8.20: V1.02 of the code. Changes in this release include selectable AGC decay rates and a rework of the AGC impulse detector. The impulse detector needs a bit more on-air testing (and threshold + delay fettling) before I replace the provious algorithm permanently.

Update 26.6.20: Latest batch of kits is now available. Other than that, no software mods to speak of. (I have written an Iambic keyer / Morse memory keyer for an STM32 Nucleo board as a bit of fun and as a test beacon for tracing RFI problems round the house.)

Update 8.4.20: I have been doing some experiments with Digital Radio Mondiale (DRM). Using the Dream software (V2.1.1) on Linux I wondered whether Dream would be able to cope with the 10kHz-wide COFDM signal being presented as a real (mono) signal from a receiver, rather than only being able to accept an IQ signal (stereo) from an SDR with such an output (e.g. RTL, KiWi or Icom IC7300). As it happens, Dream can do this. Having struggled to get sufficient audio bandwidth from my old TS450 (with IF filters switched out) I decided to make a change to my SDR to enable wideband output. I have added a 'very-wide' mode for SSB and AM that allows me to get the whole 10kHz COFDM signal out. My conclusion is that a) DRM quality is pretty poor, b) DRM robustness is pretty poor and c) there really isn't that much DRM around. At least I have tried it and I have concluded that I am not going to be adding native DRM receive to this SDR - it's a lot of work and there's really little point.

Update 8.1.20: V1.00 of the code is finally ready. The FFT tuning indicator is working well and even though PSK decode really could do with an AFC, it is possible to receive most stuff by manual tuning. Drop me an email if you'd like a copy. (PS I got hacked by a Chinese bot last week and my system was compromised with malware. I have since spent ages rebuilding my PC AGAIN. So beware Linux users, hosting any kind of web-accessible service is dangerous. Its a shame really for people like me who are only trying to make stuff available to others.)

Update 1.1.20: First cut of FFT tuning indicator for data modes done & being tested. Still some minor tweaks to be done to account for some subtle differences between data modes. Not quite ready for release yet.

Update 30.11.19: No progress for a few months: Way too much other stuff going on, plus I have had to move my main Linux PC (the radio development platform) on to a new distro, then install/configure the multitude of apps that I depended on on the old system - you know how it is. ST's Atolic TrueStudio for Linux was a total disaster (ST should be ashamed), so I have gone back to vanilla Eclipse with ARM cross-development plugins, separate ARM GCC compiler and OpenOCD debugger. I am now running code built with the new dev-tools. Raspberry Pi running the website has become unreliable - I need to look into this...

Update 19.6.19: Couple of PSK videos added at the bottom of the page.

Update 18.6.19: First cut of the PSK31/63/125 decoder has been integrated into the main code and has had a little time on live signals. Overall impression is that the tuning is too critical and has to be on the nearest 10Hz step for anything to decode. This first cut uses differential PSK demodulation as a quick hack and it is not great on manky HF signals. My next step will be to code up a coherent demodulator with a carrier-recovery PLL - hopefully this will make tuning less critical. I then need to improve symbol timing recovery and squelch as these are also a bit rough...

Update 8.6.19: Health issues have been taking most of my time of late. Finally work on the PSK decoder has resumed. I have a working decoder for PSK31, 63 and 125. Still need to make some improvements to the symbol timing recovery then there will be a new code release.

Update 3.12.18: RTTY decoder is finished. As a result of the DSP code restructuring the CW decoder now operates at 300Hz (was 60Hz) and can decode CW well up to 60wpm. I have added narrow CW and SSB filters, so the normal/wide bandwidth selection in the menu is now normal/wide/narrow. PSK decoder is ongoing...

Update 2.11.18: Kits are now available again (this will be the penultimate batch). Work on RTTY and PSK31 continues with a minor architectural re-jig to support internal sample rates that are appropriate to these modulation schemes...

Update 29.10.18: Work on the RTTY decoder has FINALLY started! Plus, more Coilcraft balun transformers are on order for the kits.

Update 18.10.18: I have run out of kits again. I am conducting a stock-take and will then prepare some more.

Update 10.7.18: WIP: Adding a section on installing the HA8LFK filter to the build documentation...

Update 23.5.18: I have installed an HA8LFK 7 band RTL SDR filter in my Rx (filter type E in my software). This is working pretty well and I have reached the conclusion that I am not going to bother to finish my 7 band HF filter as time is so short here and there seems little point, given that the HA8LFK filter does pretty much the same job with the exception that there is no 0-1.6MHz filter (so I use bypass mode for freqs less than 1.6MHz). I can finally say that the addition of a preselector filter yields a useful improvement in zero-IF breakthrough and unwanted spurious images of strong broadcast signals.

Update 5.5.18: Initial investigations into disabling the STLINK processor on the Discovery boards: Not good. Unlike the Nucleo series of STM32 boards, the STLINK on the DISCO board is very heavily integrated with the PCB and the main processor. The whole DISCO board has internal 3V power and ground planes to which almost everything connects. The only exception to this is an island in the 3V plane that allows Idd measurements to be made for the main STM32F429. So far, the only option I can think of is to kill the clock on the STLINK processor when it is not needed for programming. Another problem is that it appears that the STLINK processor is responsible for delivering the /RESET signal to the main CPU (perhaps due to waiting for a handshake with a USB host) - this unfortunately delays releasing the main CPU from reset and means that a separate CPU reset will need to be provided. The first real experiment to carry out will be to kill the STLINK clock after the board has fully started to establish how much noise can be saved.

Update 24.4.18: Got the portable Rx up and running for the first time. What a nightmare trying to fit everything in! Lots of thought has gone into positioning the header connectors and planning where the cables are going to run so that the assembly will actually fit into the box - there is VERY little room spare. Initial impressions are that the spurs in this radio are quite different to those on my first one. This is most probably down to the behaviour of the STLINK part of the board as my first Rx uses a DISCO board (rev B PCB) and the portable one uses a DISC1 board (rev C PCB). I will be looking into ways to disable off the STLINK function when it is not being used.

Update 11.4.18: Started putting together a new page detailing my build of a 'portable' version of this receiver. See here.

Update 9.4.18: I have connected a MAR-6SM+ LNA onto my Rx to conduct initial tests. After re-calibrating the RSSI, the NF can be seen to be ~10dB better across all bands. Unfortunately, it is also clear that the IMD distortion of this amplifier is not as good as the op-amp circuit. In fact, pre-selection filtering would now be considered essential with this LNA. A bit disappointing. That said, theoretical models of the existing LNA using the LT6230-10 op-amp suggest that its NF should be much better than I have measured - more like 6-7dB. I need to look into the LNA situation further but for now, the high linearity of the existing op-amp LNA still make it the preferred option.

Update 3.4.18: Code V0.90 released. This adds support for the 7 band (6 HF + 6m) preselector filter from JaniLab Electronics (HA8LFK). This filter is intended for the RTL SDR but can now be used on this Rx, stand alone, or in cascade with Ross' VLF filter. For more info see here.

Update 28.2.18: I have finally built the LT6230-10 preamplifier on its own in order to measure its noise figure. The amplifier gives a net power gain of 14dB (into 50R) and the NF came out at 25dB. I will be looking into using a Mini-Circuits MAR-6SM+ as an alternative broadband gain block; this has a 3dB NF but may not provide sufficient overload performance with a supply of only 5V. If I leave this as a separate pre-amp assembly it will be possible to provide a higher rail, e.g. 8V. I will be placing a passive 6dB attenuator on its input as discussed in my preselector filter page. This will give an overall NF of the order of 9dB. Watch this space.

Update 26.2.18: Experiments with low temperature solder paste (137°C) and a hot-plate (160°C) have gone well: Mmany parts will align themselves as the solder melts. Larger components such as the tantalums take too long to heat up so a dab with a soldering iron will sort these later.

Update 18.2.18: The assembly guide document has been updated to include advice on soldering techniques and some info on debugging a board if it doesn't work first time.

Update 14.2.18: Added the 'opinion poll' section to this page.

Update 11.1.18: A new batch of kits is nearly ready and these will be slightly more comprehensive than previous ones. I will also be adding £2 onto the cost of kits posted outside the UK - sorry.

Update 3.12.17: Code V0.88 released. This adds support for my upcoming 7-band HF filter board and (optionally) Ross M's 7-band VLF version in cascade with mine. Rework of the filter schematic is now neededed due to a couple of issues discovered during prototyping. Thanks to Ross M.

Update 14.11.17: Still having a rubbish year. Cable modem failed over the weekend so no Internet. Now replaced and fingers crossed...

Update 5.9.17: Filter schematic is done and PCB layout is underway. However, work on the filter board has been slow due to the Summer getting in the way as well as a 3 month period of car nightmares which are still not quite over. Hope to resume work on the filter PCB layout before too long.

Update 24.6.17: Work has resumed on the RF pre-selector filter design. I have finally decided to use reed-relays for the filter switching (thanks to Ross M for finding a really cheap source on ebay). The SPI shift register and relay control logic is decided (74HC595 + ULN2803). The filter board will have 7 logarithmically spaced bandpass filters and 1 pass-through position, which will make it possible to cascade a 2nd 7band + passthrough board if you are particularly interested in VLF (like Ross M): This 2nd filter board will have filters all the way down to 74kHz. LC filter values for the HF board have been computed. Next need to do the schematic...

Update 15.6.17: Code V0.87b: Prototype SPI port code for an 8bit shift register/latch to drive an RF pre-selector filter board. Sent out to people who have expressed an interest in RF pre-filtering for evaluation.

Update 28.4.17: Code V0.86: I have improved the menu encoder debouncing and added a menu option to cater for encoders that produce 1 edge per step (default) and those that produce 2 edges per step.

Update 21.3.17: Kits are now available again.

Update 28.2.17: I have 1 more kit left. I have placed an order for more TCXOs and will count out the parts for more kits (which takes ages) when I can. Watch this space.

Update 18.1.17: No development to report over the Christmas period, although my Rx has been in daily use without any problems.

Update 9.10.16: My schematic review is finished and the summary is as follows: Reducing resistance around the differential amplifiers didn't reduce the Noise Figure much at all but did seem to improve IQ balance further (I now have 47dB unwanted sideband rejection). Increasing the gain of the RF preamp, combined with a reduction in the differential amplifier gain made the main difference; NF is now officially 29dB at 14.3MHz. I'm not going to strive for any more improvement with this PCB layout as the RF preamp seems to be the limiting factor. The overall performance increase is modest, so I do not think it is vital that people who have already built their boards need to re-build. I recommend the following as a minimal change: Increase R10 to 510R, reduce C12 to 7pF, reduce R24 R27 R46 & R47 to 2k2. The RSSI calibration value should not need changing.

Update 3.10.16: Schematic review status: I have increased the gain of the preamp (560R feedback) and lowered the gain of U3 and U5 to preserve strong signal performance. The genuine Noise Figure is now around 28dB (the figure quoted for the standard V1.2 PCB components below is erroneous). Lowering the resistance values by a factor of 10 around U3 and U5 has not improved the NF noticeably but has improved the IQ balance slightly to about 45dB. Work is ongoing.

Update 29.9.16: I have finally got round to reviewing the various stages of the schematic to try to improve Noise Figure whilst not impacting the strong signal performance. This is still work in progress. Appeal: If anyone has experience in the theoretical optimisation of op-amp circuit noise, or would like a free PCB to build up parts of this design to investigate noise performance, please email me. I want to stick to the current schematic as far as possible to avoid a PCB re-spin but will do so if significant changes deliver sufficient rewards.

Update 19.9.16: The new batch of PCBs has arrived back fron China. These are still V1.2 boards but I have tidied the silk screen placement a little. The good news is the PCB mounting holes do not have solder resist on them, the bad news is the routing of the board outline is not so tidy and all the boards have one 'slightly pointy' corner.

Update 11.9.16: It appears that the new STM32F429I-DISCO board (rev C PCB) will not program with the OpenOCD command that I published in my construction guide. You will need to copy this config file to the OpenOCD scripts/board/ folder (as root) and of course specify this .cfg when FLASHing the board.

Update 10.9.16: Work on the preselector filter board is delayed due to other committments as well as the need to refactor the LC filters to try to absorb the massive 92pF shunt switch capacitance. I may need to use differrent switches. Software is up to V0.83 and now has dual notch filters. More PCBs are on order from the factory. I have identified an alternative TCXO as I am now running out of the NDK parts. Coilcraft transformers can only be bought direct from Coilcraft so I will continue to kit this part (you could of course wind your own 1:4 balun).

Update 27.8.16: I have begun work on a preselector filter board. This is going to have 7 logarithmically spaced HPF/LPF pairs and will protect the mixer against out of band products for the MF and HF spectrum. I plan to use ADG728 CMOS switches but these have rather a high shunt capacitance, so I'm doing battle with trying to absorb this into the filter elements. This design will need prototyping so don't hold your breath waiting for it to be finished! Also, one builder has all but finished his receiver and has verified that the blue PCB works properly. Its the holiday season and all of the other builders seem to have been very quiet! :o)

Update 29.7.16: Slight panic(s) that the new STM32F429I-DISC1 (rev C PCB) stocked by suppliers is not identical to the previous STM32F429I-DISCO (rev B PCB). The new board works fine but could really do with wire links SB11 and SB15 removing to avoid any clash between the tuning encoder and the new USB virtual COM port. If your board will not run from an external 5V supply update its STLink firmware to V2.J27.M15 here. It will also not run unless the Windows USB drivers are loaded here (Linux is OK).

Update 12.7.16: Kit parts now counted out and ready for posting. Software updated to V0.75; now supports NV SRAM storage of VFOs, params and freq calibration.

Update 6.7.16: The PCBs are back from China already (epic service from Elecrow) and they look great, apart from some silk screen clipping that is my fault. I have consolidated my component stock and will be able to offer a kit for the majority of the passives and a few ICs for the first bunch of builders. I have updated the build documentation.

Update 29.6.16: I have finished tweaking the PCB; There was quite a lot to do such as sorting drill holes, via sizes, solder masks and the silk screen. I placed the PCB order today and these should hopefully take not much longer than a week. I have also got the battery-backed SRAM working so can confirm that there will be no need for an EEPROM.